The present invention relates to a signal detection circuit for an optical disk which detects and reproduces a signal recorded on the optical disk such as a CD (compact disk) or a CD-ROM. More particularly, this invention relates to a signal detection circuit for an optical disk which properly carries out slice-level control of a signal at the time of converting an analog signal read through a pick-up into a digital signal.
Conventionally, for reproducing information recorded on an optical disk, an analog HF signal read from the optical disk has been converted into a digital HF signal based on a predetermined slice level. In many cases, information is recorded onto an optical disk as the information of an EFM (Eight-to-Fourteen Modulation) signal of which the DC component of the signal becomes zero. Therefore, at the time of the analog/digital conversion, the slice level is controlled to become a central voltage level of the analog HF signal.
FIG. 8 is a block diagram that shows a construction of a conventional signal detection circuit for an optical disk. In FIG. 8, an analog HF signal S101 read from an optical disk by a pick-up (not shown) is input to a terminal T101. A capacitor C101 cuts a DC component of the input analog HF signal S101, and outputs an analog HF signal S102, from which the DC component has been cut out. ADC signal of a slice-level control voltage VTLC that is input through a resistor R102, which will be explained later, is superimposed on the analog HF signal S102. The analog HF signal S102 is then input to a minus (xe2x88x92) terminal of a comparator 101 as an analog HF signal S102a which has been superimposed the DC signal of the slice-level control voltage VTLC.
A reference voltage Vref is input to a plus (+) terminal of the comparator 101. The comparator 101 compares the analog HF signal S102a with the reference voltage Vref, and outputs a result of the comparison as a digital HF signal S103. In other words, the comparator 101 executes an analog/digital conversion for converting the analog HF signal S102a into the digital HF signal S103.
The digital HF signal S103 output from the comparator 101 is input to a digital signal processing circuit 103. The digital signal processing circuit 103 processes the input digital HF signal S103 to reproduce a voice signal and a video signal, and outputs these signals.
Further, the digital HF signal S103 output from the comparator 101 is input to a charge-pump circuit 104. The charge-pump circuit 104 controls charge/discharge volumes to be applied to a capacitor C102 so that a plus (+) side electrode voltage of the capacitor C102 becomes a proper slice-level control voltage VTLC corresponding to an average DC level of the input digital HF signal S103. This slice-level control voltage VTLC is input to the minus (xe2x88x92) terminal of the comparator 101 through a resistor R102.
In other words, the reference voltage Vref is constant when the comparator 101 executes the analog/digital conversion. Therefore, based on the control of the charge/discharge volumes of the capacitor C102, the charge-pump circuit 104 feedback-controls the slice-level control voltage VTLC at a connection point P101 that is superimposed on the analog HF signal S102. Further, the charge-pump circuit 104 controls the central voltage level of the analog HF signal S102 so that the voltage relatively becomes the reference voltage Vref at the time of the analog/digital conversion. In this case, the digital HF signals S103 output from the comparator 101 include high-level signals and low-level signals that are generated uniformly. Therefore, the charge-pump circuit 104 detects an average DC level of the input digital HF signals S103 to control the charge/discharge volumes of the capacitor C102.
The digital HF signal S103 output from the comparator 101 is input to a dropout-signal detection circuit 102. The dropout-signal detection circuit 102 detects an envelope SE of the digital HF signal S103 by using, for example, a peak-holding circuit. When the voltage level of this envelope has become a predetermined value or lower, the dropout-signal detection circuit 102 outputs a signal S104 that shows the occurrence of a dropout signal (dropout) to a charge-pump circuit 104. This dropout signal is generated by the scratch of an optical disk or by the oscillation of the optical disk at the time of reading.
When the signal S104 that shows the occurrence of a dropout signal has been input to the charge-pump circuit 104, the charge-pump circuit 104 sets the output to the OFF state, that is, a high-impedance state, and maintains the slice-level control voltage VTLC at the connection point P101.
FIG. 9 is a timing chart that shows a slice-level operation when a dropout signal has occurred in the conventional signal detection circuit for an optical disk. In FIG. 9, when a dropout E101 has occurred in an input analog HF signal S102, the voltage of an envelope SE of a digital HF signal S103 becomes a predetermined value or lower. A dropout-signal detection circuit 102 detects a dropout signal, and outputs a signal S104 to a charge-pump circuit 104. This signal S104 is kept being output until when the voltage level of the envelope SE has exceeded a predetermined value. During a period while this signal S104 is in the ON state, the charge-pump circuit 104 keeps the output in the OFF state, and holds the slice-level control voltage VTLC at a point tbb when the dropout signal has been detected.
With this arrangement, the slice-level control voltage VTLC is forcibly set to a high level. Therefore, even when a dropout signal has occurred and the analog HF signal S102 has come to contain only a noise component, it is possible to prevent this erroneous digital HF signal S103 from being output to the digital signal processing circuit 103.
The above-described conventional signal detection circuit for an optical disk, however, has the following drawbacks. The charge-pump circuit 104 operates as if there has occurred no dropout signal during the period from a time taa when the analog HF signal S102 has actually become a dropout signal to the time tbb when the dropout-signal detection circuit 102 has detected the dropout signal. During this period, the charge-pump circuit 104 charges the capacitor C102, and controls the slice-level control voltage VTLC from increasing, based on a time constant determined by the capacitor C102 and the resistor R102. Therefore, the slice-level control voltage VTLC varies. As a result, the signal detection circuit detects unnecessary signals such as noise, and outputs an erroneous digital HF signal S103 to the digital signal processing circuit 103.
Further, a DC signal based on the slice-level control voltage VTLC increases or decreases depending on the time constant that is determined by the capacitor C102 and the resistor R102. Therefore, when there is no occurrence of a dropout signal, it is possible to obtain a more stable digital HF signal by setting the time constant to a larger value. However, when the time constant is set to a larger value, it takes a long time for the slice-level control voltage VTLC to recover to the normal level after there has been no dropout signal. Accordingly, when the time constant determined by the capacitor C102 and the resistor R102 is set to a small value, a variation occurs in the slice-level control voltage VTLC that is held after the dropout signal has been detected. In this case, there is also a problem that a wrong digital HF signal S103 is output to the digital signal processing circuit 103.
It is an object of the present invention to provide a signal detection circuit for an optical disk which can stably supply a slice-level control voltage VTLC when a dropout signal has occurred, and when a dropout signal has not occurred respectively, and which can detect and output a digital HF signal without an error.
According to one aspect of this invention, when a dropout-detection unit is in a normal state of not detecting a dropout of the analog signal, first and second voltage-storing units store voltages of slice levels controlled by a slice-level control unit. When the dropout-detection unit has detected a dropout of an analog signal, a voltage-holding unit holds the voltage of a slice level stored in a second voltage-storing unit. The voltage held by the voltage-holding unit is fed back to a converting unit. During the period of the dropout of the analog signal, the voltage-holding unit holds the voltage of the slice level at the time of the detection of the dropout of the analog signal, as an actual operation voltage.
According to another aspect of this invention, when a dropout-detection unit is in a normal state of not detecting a dropout of an analog signal, a voltage-storing unit stores a voltage of slice level controlled by a slice-level control unit. When the dropout-detection unit has detected a dropout of the analog signal, a voltage-holding unit holds the voltage of the slice level stored in the voltage-storing unit. The voltage held in the voltage-holding unit is fed back to a converting unit. During the period of the dropout of the analog signal, the voltage-holding unit holds the voltage of the slice level at the time of a detection of the dropout of the analog signal, as an actual operation voltage.
According to still another aspect of this invention, when the dropout-detection unit is in a normal state of not detecting a dropout of an analog signal, a third change-over switch is set to an OFF state. First to third voltage-storing units store voltages of slice levels controlled by a slice-level control unit. A slice level is controlled at the voltage stored in the first voltage-storing unit. In this case, a changeover control unit always controls first and second changeover switches to make the second and third voltage-storing units store voltages alternately; While the second voltage-storing unit stores the voltage, the voltage stored in the third voltage-storing unit is output to a voltage-holding unit. While the third voltage-storing unit stores the voltage, the voltage stored in the second voltage-storing unit is output to the voltage-holding unit. When a dropout-detection unit has detected the dropout of the analog signal, a third changeover switch is set to the ON state. The voltages stored in the second and third voltage-storing units are output alternately through the voltage-holding unit. The slice level is controlled at this voltage. With this arrangement, the slice level immediately before the occurrence of the dropout of the analog signal is used as the slice level at and after the point of time of the detection of the dropout of the analog signal. Thus, the voltage of the slice level is controlled securely and stably.
Further, the voltage-holding unit is realized by a voltage follower. Therefore, when a dropout of the analog signal has occurred, a voltage of the slice level is stably and surely supplied.
Other objects and features of this invention will become apparent from the following description with reference to the accompanying drawings.